CS3351 – Digital Principles and Computer Organization Important questions

COURSE OBJECTIVES:

• To analyze and design combinational circuits.
• To analyze and design sequential circuits
• To understand the basic structure and operation of a digital computer.
• To study the design of data path unit, control unit for processor and to familiarize with the hazards.
• To understand the concept of various memories and I/O interfacing.

UNIT I COMBINATIONAL LOGIC
Combinational Circuits – Karnaugh Map – Analysis and Design Procedures – Binary Adder –
Subtractor – Decimal Adder – Magnitude Comparator – Decoder – Encoder – Multiplexers –
Demultiplexers

UNIT II SYNCHRONOUS SEQUENTIAL LOGIC
Introduction to Sequential Circuits – Flip-Flops – operation and excitation tables, Triggering of FF,
Analysis and design of clocked sequential circuits – Design – Moore/Mealy models, state
minimization, state assignment, circuit implementation – Registers – Counters.

UNIT III COMPUTER FUNDAMENTALS
Functional Units of a Digital Computer: Von Neumann Architecture – Operation and Operands of
Computer Hardware Instruction – Instruction Set Architecture (ISA): Memory Location, Address
and Operation – Instruction and Instruction Sequencing – Addressing Modes, Encoding of Machine
Instruction – Interaction between Assembly and High Level Language.

UNIT IV PROCESSOR
Instruction Execution – Building a Data Path – Designing a Control Unit – Hardwired Control,
Microprogrammed Control – Pipelining – Data Hazard – Control Hazards.

UNIT V MEMORY AND I/O
Memory Concepts and Hierarchy – Memory Management – Cache Memories: Mapping and
Replacement Techniques – Virtual Memory – DMA – I/O – Accessing I/O: Parallel and Serial
Interface – Interrupt I/O – Interconnection Standards: USB, SATA

UNIT 1

1. Karnaugh Map(sop & pos)
2. Multiplexers & mux problems
   3.Decimal Adder also called as BCD adder
   4.full adder & full subtractor
   5.priority encoder, seven segment display decoder

UNIT 2

1.COUNTERS: synchronous(johnson) counter, asynchronous(ripple) counter, modulo counter &up/down counter
2.Moore/Mealy models, state minimization, state assignment

3. Registers and its types and flipflop conversion

UNIT 3

1.Von Neumann Architecture – Operation and Operands of Computer Hardware
Instruction

2. Instruction Set Architecture (ISA): Memory Location, Address and Operation
3. Instruction and Instruction Sequencing – Addressing Modes

UNIT 4

1. Pipelining
2. Hardwired Control & Microprogrammed Control
3. Data Hazard & Control hazards

Unit V

1.memory management and hierarchy

2. Virtual memory
3. DMA
4. I/O